The adoption of Excellicon tools addresses the issue of multiple iterations between design and implementation teams, in which the timing constraints (SDC) design and validation are often the culprit of prolonged delivery schedules. The users of Excellicon tools can start from scratch or leverage existing timing constraints files in order to automate the development of their timing constraints used for placement and routing of the chip. By eliminating unnecessary iterations, designers are expected to achieve higher levels of accuracy and to be able to commit to more aggressive schedules.
Excellicon is an innovative provider of end-to-end Timing Constraints Analysis and Debugging solutions for the automation of constraints authoring, completion, and validation from RTL to GDS with necessary analysis and debugging infrastructures. Excellicon products CONstraints MANager, CONstraints CERTifier, and CONSTAr address the needs of designers at every stage of SOC design and implementation in a unified environment. Timing Closure; Done Once! Done Right! www.excellicon.com
MaxLinear is a provider of highly integrated radio-frequency analog and mixed signal semiconductor SoC solutions for broadband communications applications offering high levels of performance, small silicon die-size, and low power consumption. MaxLinear's products enable the reception of broadband data and video content in a wide range of electronic devices, including cable and terrestrial set-top boxes, DOCSIS voice and data cable modems, digital televisions, personal computers, netbooks and in-vehicle entertainment devices.
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