These highly-integrated Interface PHY’s lead the industry in jitter performance, small package size and low power consumption.
The IP Track at the 51st DAC focuses on the latest developments and approaches to IP quality. Real world examples will illustrate how methodology, design management, verification, and metrics can lead to better, more reliable products.
WHAT: OmniPhy will present on “Managing Designs to Produce High-quality PHY IPs.” Abstract:
WHEN: The Verification topic area of the IP Track
WHO: Ritesh Saraf (C.E.O) - OmniPhy, Claude Gauthier (C.O.O) - OmniPhy and Amit Varde (Applications Manager) - ClioSoft
WHERE: Room 101, Moscone Center, San Francisco, CA.
OmniPhy’s Interface IP portfolio for System on Chip (SOC) includes solutions for 10/100/
OmniPhy is a leading provider of high-quality, silicon-proven IP solutions for system-on-chip (SoC) Interface designs. The broad IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP and subsystems. With a robust IP development methodology, extensive investment in quality, IP prototyping and comprehensive technical support, OmniPhy enables designers to accelerate time-to-market and reduce integration risk. . For more information on OmniPhy IP, visit http://omniphysemi.com.