IJRDE publishes the first issue in Volume 2

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Sept. 3, 2013 - PRLog -- IJRDE - Volume2: Issue1.

As part of the second edition (Volume 2) of IJRDE, 20 papers were received, of which 6 were selected for publication. All the papers underwent intensive review process by experts from prestigious organizations like IBM, Infosys, TI  and pioneers from the academic fields. The acceptance ratio of the first issue (Volume 2) of IJRDE is 30%.

The papers will be indexed in Doxtop, NewJour, Academia, Computer Science Directories, DOAJ, Index Copernicus, Open Research, ResearchGate, Scirus, WePapers, ScienceCentral, Scribd and Google Scholar.

Editor

editor@ijrde.com

Papers
Implementation and Performance Analysis of Improved DSR Routing Protocol to Detect an Inimical Node in MANETs Using NS-2 (http://www.ijrde.com/index.php/current-issue/91-implementation-and-performance-analysis-of-improved-dsr-routing-protocol-to-detect-an-inimical-node-in-manets-using-ns-2)

Authors:


Arjun Saini, Vijander Singh, Computer Science, Amity University Rajasthan (ASET), Jaipur, Rajasthan,India

Abstract:

In this paper we have introduced an inimical node into DSR routing protocol implementation by which we found that it affects the working of DSR and degrades its performance. So to solve this kind of problem we introduce a solution as Improved DSR by which we are able to improve the performance of DSR with inimical node. We have used NS-2.34 network simulator for our simulation work. By simulation we have calculated throughput, end to end delay, PDR, Packet loss and routing overload using Random waypoint mobility model.

FPGA Based Edge Detection Using Modified Sobel Filter (http://www.ijrde.com/index.php/current-issue/92-fpga-base...)

Authors:


Dr. Abdulsattar M. Khidhir, Nawal Younis Abdullah, Computer Systems Department, Technical Institute/ Foundation of Technical Education, Iraq.

Abstract:

In recent years, edge detection technology has gradually been widely used. This paper presents one of the classical edge detection operators, Sobel edge detector. Field Programmable Gate Array (FPGA) technology becomes an alternative for the implementation of software algorithms. This paper presents FPGA based architecture for Sobel operator using Virtex-5 ML506 board to find the edges for grayscale images. Firstly, the standard Sobel operator is used to detect the edges in grayscale images. Then the Sobel operator is modified to find the edges for the images with noise reduction. The system for edge detection is done with the combination of EDK(Embedded Development Kit) and Matlab environments.

Synthesis of R-L-C Circuit Using Embedded System Design Techniques FPGA (http://www.ijrde.com/index.php/current-issue/93-synthesis...)

Authors:


Mazin Rejab Khalil,  Shaima Mohammed Ali Department of Computer Technical Engineering, Technical College, Mosul, Iraq

Abstract:

The paper aims to synthesize R-L-C circuit with the aid of Embedded Design Techniques (EDTs). Soft-core processor system is developed and configured on Spartan 3E FPGA slice. The system is programmed by C language and accommodated to synthesize R-L-C circuit. Cauer synthesis method based on the Continued Fraction Expansion analysis is used to infer the form of the circuit, type of components and their values from the transfer function of the circuit. The work provides a simple algorithm to synthesize analog filters with the aid of soft-core processor system.


A Real Time Dynamic 3D Graphics Processor Using FPGA (http://www.ijrde.com/index.php/current-issue/94-a-real-ti...)

Authors:


Dr. Basma Mohammed Kamal Younis1, Ne'am Salim Mohammed Sheet Department of Computer Technology Engineering/ Technical College, Mosul, Iraq

Abstract:

Mainframe, being one of the oldest technologies being used, is seen as one which can serve only as a back-end to applications. An unappealing user interface is by far the most apt reason for this. The GUI can be improved by incorporating Primary Source Learning (PSL). PSL can be defined as an ‘Illustrated Help Menu’ aimed at assisting a user in learning the various functionalities of an application package. A user friendly application 'help demo' is one thing that help us to deliver great product and attract customers. A help demo is a must for any stamp application, through which we have a control over the way customers interpret our application. In addition to this,we are also able to provide a type of human-computer interface that uses windows that be minimized and maximized, without actually closing the underlying application program in the Mainframe Environment. Additionally we will also discuss about developing a web application in Mainframe using HTML in CICS.
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