Due to the growing complexity of today’s semiconductor chip designs, which may include multiple cores, graphics engines, signal processing engines and various complex interfaces, functional verification has become the biggest impediment to successful chip design. The complexity and cost of verifying these designs is growing exponentially, requiring literally thousands of simulation licenses. The (per seat) time based licensing (TBL) model currently prevalent in EDA industry does not accommodate these customer needs and makes timely completion of functional verification either impossible or extremely cost prohibitive.
Recognizing this breakdown of the current licensing model, Axiom pioneered the concept of Worldwide Unlimited Licensing (WUL); enabling users to get unlimited simulation licenses at a fixed cost, usually in the affordable sub-million dollar range for semiconductor companies with revenues under $500M.
“At Axiom, we have always been focused on solving our customers’ verification problems”, said Badru Agrawala, President and CEO, Axiom Design Automation. “With our continuous innovation in multi-CPU simulation, multi-core waveform dumping, coverage closure and the industry’s most advanced UVM debug capabilities, we have been in the forefront of recognizing and solving the most pressing verification challenges. We recognized the broken TBL model early on and introduced the WUL model to a select customer base. The response was overwhelming. We have several customers who have already adopted this model and have successfully taped-out very complex chips in record time with our production proven MPSim simulator. Now we have decided to roll it out and make it available to everyone”.
“Simulation still remains the main workhorse for functional verification”
Axiom’s MPSim is industry’s price/performance leading SystemVerilog verification platform. MPSim offers significant new capabilities in simulation performance, debugging, coverage analysis and SystemVerilog enhancements including the newly released UVMDesigner and complete support for VMM, OVM and UVM. Combined with multi-core support, compiled testbench including SystemVerilog and OpenVera, comprehensive coverage closure technology and best-in-class integrated graphical debugger, MPSim offers the most complete verification solution in a single unified kernel architecture for maximum performance.
Axiom Design Automation is a company focused on providing the best-in-class verification platform to address the growing complexity of today’s FPGAs, ICs, SOCs and systems. Axiom’s flagship product, MPSim is the state-of-the-
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